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Entities25 of 207,987

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Entity

intrinsic-timing power-of-two STDP

technology1 mentionslast seen Sep 16, 2026

A hardware-efficient synaptic learning algorithm designed to address hardware and energy overheads associated with SNN training through algorithmic and hardware-level optimizations.

Relationships 3

intrinsic-timing power-of-two STDPapplies tospiking neural network90% confidence1 source
intrinsic-timing power-of-two STDPimplementsspike-timing-dependent plasticity90% confidence1 source
intrinsic-timing power-of-two STDPsupersedesspike-timing-dependent plasticity85% confidence1 source

intrinsic-timing power-of-two STDP

Relationship

intrinsic-timing power-of-two STDPimplementsspike-timing-dependent plasticity

90% confidence1 supporting mentions

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Sources 1

preprintarXivAug 31, 2026ITP-STDP: A Hardware-Efficient Intrinsic-Timing Power-of-Two Synaptic Learning Engine for On-Chip SNNs
this paper presents intrinsic-timing power-of-two STDP (ITP-STDP)